Features

• • Configurable output_mask function
• • Support AHB interface and EMIF interface
• • 32-bit AHB data buses
• • 8-bit EMIF data buses
• • Support single AHB transfer
• • Programmable BASE_ADDR for internal registers
• • EMIF interface address must be 0x4 aligned,
• • AHB interface address must be 0x10 aligned